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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_csi2_tx___s_pkt_data.html">XCsi2Tx_SPktData</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains the Short Packet information from the Generic Short Packet Register.  <a href="struct_x_csi2_tx___s_pkt_data.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_csi2_tx___config.html">XCsi2Tx_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The configuration structure for CSI Controller.  <a href="struct_x_csi2_tx___config.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_csi2_tx.html" title="The XCsi2Tx driver instance data. ">XCsi2Tx</a> driver instance data.  <a href="struct_x_csi2_tx.html#details">More...</a><br/></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:gad58795e87b55fa4c2aea73405171341d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#gad58795e87b55fa4c2aea73405171341d">XCSI2TX_H_</a></td></tr>
<tr class="memdesc:gad58795e87b55fa4c2aea73405171341d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Prevent circular inclusions by using protection macros.  <a href="group__csi2tx.html#gad58795e87b55fa4c2aea73405171341d">More...</a><br/></td></tr>
<tr class="separator:gad58795e87b55fa4c2aea73405171341d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga22c9436f428a8fc799706fb133cb07e4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga22c9436f428a8fc799706fb133cb07e4">XCSI2TX_ENABLE</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ga22c9436f428a8fc799706fb133cb07e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flag denoting enabling of CSI.  <a href="group__csi2tx.html#ga22c9436f428a8fc799706fb133cb07e4">More...</a><br/></td></tr>
<tr class="separator:ga22c9436f428a8fc799706fb133cb07e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5b4a62581a8f8fd68092c4d9f63c7fe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#gaa5b4a62581a8f8fd68092c4d9f63c7fe">XCSI2TX_DISABLE</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:gaa5b4a62581a8f8fd68092c4d9f63c7fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flag denoting disabling of CSI.  <a href="group__csi2tx.html#gaa5b4a62581a8f8fd68092c4d9f63c7fe">More...</a><br/></td></tr>
<tr class="separator:gaa5b4a62581a8f8fd68092c4d9f63c7fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9dfcb58942d4e840968868fc0decea38"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga9dfcb58942d4e840968868fc0decea38">XCSI2TX_MAX_LANES</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:ga9dfcb58942d4e840968868fc0decea38"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max Lanes supported by CSI.  <a href="group__csi2tx.html#ga9dfcb58942d4e840968868fc0decea38">More...</a><br/></td></tr>
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<tr class="memitem:gaad964d27150f8888fdcde05db9f9ad18"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#gaad964d27150f8888fdcde05db9f9ad18">XCSI2TX_MAX_VC</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:gaad964d27150f8888fdcde05db9f9ad18"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max number of Virtual Channels.  <a href="group__csi2tx.html#gaad964d27150f8888fdcde05db9f9ad18">More...</a><br/></td></tr>
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<tr><td colspan="2"><div class="groupHeader">Interrupt Types for setting Callbacks</div></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCSI2TX_HANDLER_WRG_LANE</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCSI2TX_HANDLER_GSPFIFO_FULL</b>&#160;&#160;&#160;2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCSI2TX_HANDLER_ULPS</b>&#160;&#160;&#160;3</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCSI2TX_HANDLER_LINEBUF_FULL</b>&#160;&#160;&#160;4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCSI2TX_HANDLER_WRG_DATATYPE</b>&#160;&#160;&#160;5</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCSI2TX_HANDLER_UNDERRUN_PIXEL</b>&#160;&#160;&#160;6</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCSI2TX_HANDLER_LCERRVC0</b>&#160;&#160;&#160;7</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCSI2TX_HANDLER_LCERRVC1</b>&#160;&#160;&#160;8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCSI2TX_HANDLER_LCERRVC2</b>&#160;&#160;&#160;9</td></tr>
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<tr class="memitem:gaeba76537f34ec4d0b563c28ad9aab71a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeba76537f34ec4d0b563c28ad9aab71a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCSI2TX_HANDLER_LCERRVC3</b>&#160;&#160;&#160;10</td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:gaaa39ebc6ffb192f283664d248374eae2"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#gaaa39ebc6ffb192f283664d248374eae2">XCsi2Tx_CallBack</a> )(void *CallBackRef, u32 Mask)</td></tr>
<tr class="memdesc:gaaa39ebc6ffb192f283664d248374eae2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Callback type for all interrupts defined.  <a href="group__csi2tx.html#gaaa39ebc6ffb192f283664d248374eae2">More...</a><br/></td></tr>
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Enumerations</h2></td></tr>
<tr class="memitem:ga46a443dfffd8f26578ebaf2a6139b4f3"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga46a443dfffd8f26578ebaf2a6139b4f3">XCsi2Tx_LCStatus</a> { <a class="el" href="group__csi2tx.html#gga46a443dfffd8f26578ebaf2a6139b4f3ae2ab61672a5cb405cae8c9770e7e7710">XCSI2TX_LC_LESS_LINES</a> = 1, 
<a class="el" href="group__csi2tx.html#gga46a443dfffd8f26578ebaf2a6139b4f3a328322afaa225277614e41216fb55954">XCSI2TX_LC_MORE_LINES</a>
 }</td></tr>
<tr class="memdesc:ga46a443dfffd8f26578ebaf2a6139b4f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef defines the different errors codes for Line Count status for a Virtual Channel when Frame End Generation is enabled.  <a href="group__csi2tx.html#ga46a443dfffd8f26578ebaf2a6139b4f3">More...</a><br/></td></tr>
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Functions</h2></td></tr>
<tr class="memitem:gaf7407d28ef78a246a921b758e837dd90"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_csi2_tx___config.html">XCsi2Tx_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#gaf7407d28ef78a246a921b758e837dd90">XCsi2Tx_LookupConfig</a> (u32 DeviceId)</td></tr>
<tr class="memdesc:gaf7407d28ef78a246a921b758e837dd90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Look up the hardware configuration for a device instance.  <a href="group__csi2tx.html#gaf7407d28ef78a246a921b758e837dd90">More...</a><br/></td></tr>
<tr class="separator:gaf7407d28ef78a246a921b758e837dd90"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac9ea3e1e3c6a8ecc2f5074caca2e4c6b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#gac9ea3e1e3c6a8ecc2f5074caca2e4c6b">XCsi2Tx_CfgInitialize</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr, <a class="el" href="struct_x_csi2_tx___config.html">XCsi2Tx_Config</a> *CfgPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:gac9ea3e1e3c6a8ecc2f5074caca2e4c6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the <a class="el" href="struct_x_csi2_tx.html" title="The XCsi2Tx driver instance data. ">XCsi2Tx</a> instance provided by the caller based on the given Config structure.  <a href="group__csi2tx.html#gac9ea3e1e3c6a8ecc2f5074caca2e4c6b">More...</a><br/></td></tr>
<tr class="separator:gac9ea3e1e3c6a8ecc2f5074caca2e4c6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga874801fd63ef703d0b8ec36379b743a7"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga874801fd63ef703d0b8ec36379b743a7">XCsi2Tx_Configure</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga874801fd63ef703d0b8ec36379b743a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will configure the core with proper number of Active Lanes.  <a href="group__csi2tx.html#ga874801fd63ef703d0b8ec36379b743a7">More...</a><br/></td></tr>
<tr class="separator:ga874801fd63ef703d0b8ec36379b743a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7f455150c7e612ad6ddf0c052fff1f57"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga7f455150c7e612ad6ddf0c052fff1f57">XCsi2Tx_Activate</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr, u8 Flag)</td></tr>
<tr class="memdesc:ga7f455150c7e612ad6ddf0c052fff1f57"><td class="mdescLeft">&#160;</td><td class="mdescRight">Thsi function will enable/disable the IP Core to start processing.  <a href="group__csi2tx.html#ga7f455150c7e612ad6ddf0c052fff1f57">More...</a><br/></td></tr>
<tr class="separator:ga7f455150c7e612ad6ddf0c052fff1f57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5a0232c79ceea489774863ec4cc3d9e0"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga5a0232c79ceea489774863ec4cc3d9e0">XCsi2Tx_Reset</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga5a0232c79ceea489774863ec4cc3d9e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will do a reset of the IP.  <a href="group__csi2tx.html#ga5a0232c79ceea489774863ec4cc3d9e0">More...</a><br/></td></tr>
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<tr class="memitem:gad74fa52c21a09573d7838c8ec469cb82"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#gad74fa52c21a09573d7838c8ec469cb82">XCsi2Tx_GetShortPacket</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr, <a class="el" href="struct_x_csi2_tx___s_pkt_data.html">XCsi2Tx_SPktData</a> *ShortPacketStruct)</td></tr>
<tr class="memdesc:gad74fa52c21a09573d7838c8ec469cb82"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will get the short packet received in the FIFO from the Generic Short Packet Register and fill up the structure passed from caller.  <a href="group__csi2tx.html#gad74fa52c21a09573d7838c8ec469cb82">More...</a><br/></td></tr>
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<tr class="memitem:gac3002b53f14fc92a2f9dbd70466fb54f"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#gac3002b53f14fc92a2f9dbd70466fb54f">XCsi2Tx_IsActiveLaneCountValid</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr, u8 ActiveLanesCount)</td></tr>
<tr class="memdesc:gac3002b53f14fc92a2f9dbd70466fb54f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks the validity of the active lanes parameter.  <a href="group__csi2tx.html#gac3002b53f14fc92a2f9dbd70466fb54f">More...</a><br/></td></tr>
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<tr class="memitem:ga1f42ddbe8c72819877271b1e2b1b2f66"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga1f42ddbe8c72819877271b1e2b1b2f66">XCsi2Tx_SetLineCountForVC</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr, u8 VC, u16 LineCount)</td></tr>
<tr class="memdesc:ga1f42ddbe8c72819877271b1e2b1b2f66"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the Line Count for virtual Channel if Frame End Generation feature is enabled.  <a href="group__csi2tx.html#ga1f42ddbe8c72819877271b1e2b1b2f66">More...</a><br/></td></tr>
<tr class="separator:ga1f42ddbe8c72819877271b1e2b1b2f66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7aceee43ac75b5e2e7fb5c072e99543d"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga7aceee43ac75b5e2e7fb5c072e99543d">XCsi2Tx_GetLineCountForVC</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr, u8 VC, u16 *LineCount)</td></tr>
<tr class="memdesc:ga7aceee43ac75b5e2e7fb5c072e99543d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the Line Count for virtual Channel if Frame End Generation feature is enabled.  <a href="group__csi2tx.html#ga7aceee43ac75b5e2e7fb5c072e99543d">More...</a><br/></td></tr>
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<tr class="memitem:ga8c4f599fd297b0b87b7b5028bc59a1a4"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga8c4f599fd297b0b87b7b5028bc59a1a4">XCsi2Tx_SelfTest</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga8c4f599fd297b0b87b7b5028bc59a1a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Runs a self-test on the driver/device.  <a href="group__csi2tx.html#ga8c4f599fd297b0b87b7b5028bc59a1a4">More...</a><br/></td></tr>
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<tr class="memitem:gafc4a705bd3a295ac372fa02eb578af4d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#gafc4a705bd3a295ac372fa02eb578af4d">XCsi2Tx_IntrHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:gafc4a705bd3a295ac372fa02eb578af4d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the interrupt handler for the CSI2 Tx core.  <a href="group__csi2tx.html#gafc4a705bd3a295ac372fa02eb578af4d">More...</a><br/></td></tr>
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<tr class="memitem:ga4dd6f019a905c50bfa662e9823cf5b00"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga4dd6f019a905c50bfa662e9823cf5b00">XCsi2Tx_SetCallBack</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr, u32 HandleType, void *Callbackfunc, void *Callbackref)</td></tr>
<tr class="memdesc:ga4dd6f019a905c50bfa662e9823cf5b00"><td class="mdescLeft">&#160;</td><td class="mdescRight">This routine installs an asynchronous callback function for the given HandlerType:  <a href="group__csi2tx.html#ga4dd6f019a905c50bfa662e9823cf5b00">More...</a><br/></td></tr>
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<tr class="memitem:ga3ff13690fd3d7cbb9ef1b0b8bf579235"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga3ff13690fd3d7cbb9ef1b0b8bf579235">XCsi2Tx_GetIntrEnable</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga3ff13690fd3d7cbb9ef1b0b8bf579235"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will get the interrupt mask set (enabled) in the CSI2 Tx core.  <a href="group__csi2tx.html#ga3ff13690fd3d7cbb9ef1b0b8bf579235">More...</a><br/></td></tr>
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<tr class="memitem:ga2caa416a631b37b3414f3ebe811fb50e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga2caa416a631b37b3414f3ebe811fb50e">XCsi2Tx_IntrEnable</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga2caa416a631b37b3414f3ebe811fb50e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will enable the interrupts present in the interrupt mask passed onto the function.  <a href="group__csi2tx.html#ga2caa416a631b37b3414f3ebe811fb50e">More...</a><br/></td></tr>
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<tr class="memitem:gad54b9d4f661d683594d59fe7ab428962"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#gad54b9d4f661d683594d59fe7ab428962">XCsi2Tx_IntrDisable</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:gad54b9d4f661d683594d59fe7ab428962"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will disable the interrupts present in the interrupt mask passed onto the function.  <a href="group__csi2tx.html#gad54b9d4f661d683594d59fe7ab428962">More...</a><br/></td></tr>
<tr class="separator:gad54b9d4f661d683594d59fe7ab428962"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga40b9d2c4e3ac95c5a55c085ba0412304"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga40b9d2c4e3ac95c5a55c085ba0412304">XCsi2Tx_GetIntrStatus</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga40b9d2c4e3ac95c5a55c085ba0412304"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will get the list of interrupts pending in the Interrupt Status Register of the CSI2 Tx core.  <a href="group__csi2tx.html#ga40b9d2c4e3ac95c5a55c085ba0412304">More...</a><br/></td></tr>
<tr class="separator:ga40b9d2c4e3ac95c5a55c085ba0412304"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60da0ba950424b0e90d2cf108eefed2c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csi2tx.html#ga60da0ba950424b0e90d2cf108eefed2c">XCsi2Tx_InterruptClear</a> (<a class="el" href="struct_x_csi2_tx.html">XCsi2Tx</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga60da0ba950424b0e90d2cf108eefed2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will clear the interrupts set in the Interrupt Status Register of the CSI2 Tx core.  <a href="group__csi2tx.html#ga60da0ba950424b0e90d2cf108eefed2c">More...</a><br/></td></tr>
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